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User contributions for Phi2x

Results for Phi2x talk block log uploads logs
A user with 0 edits. Account created on 1 September 2026.

15:3215:32, 6 July 2024 diff hist +225 CRTC →HSYNC and VSYNC
15:0015:00, 6 July 2024 diff hist −24 CRTC →CRTC counter differences
14:5214:52, 6 July 2024 diff hist −1 CRTC →Overscan bits
14:5114:51, 6 July 2024 diff hist +12 CRTC →Overscan bits
14:4414:44, 6 July 2024 diff hist +5 PAL16L8 →See also
14:4314:43, 6 July 2024 diff hist 0 Gate Array No edit summary
14:4214:42, 6 July 2024 diff hist −9 ASIC →External links
14:4114:41, 6 July 2024 diff hist −3 Programming:Unlocking ASIC →BASIC version
14:3914:39, 6 July 2024 diff hist −6 Default I/O Port Summary →Related pages
14:3814:38, 6 July 2024 diff hist −1 Default I/O Port Summary →Internal Links
14:3814:38, 6 July 2024 diff hist −6 ASIC No edit summary
14:3714:37, 6 July 2024 diff hist −1 ASIC →Internal links
14:3314:33, 6 July 2024 diff hist −12 CRTC →VCC (C4) overflow
14:1514:15, 6 July 2024 diff hist −12 CRTC →VTAC (C5/C9) overflow
14:0114:01, 6 July 2024 diff hist 0 Default I/O Port Summary →Memory Mapped I/O Ports
14:0114:01, 6 July 2024 diff hist 0 ASIC →DMA sound channels
14:0014:00, 6 July 2024 diff hist +1 ASIC →DMA sound channels
13:4813:48, 6 July 2024 diff hist −10 ASIC →Vectored interrupt
13:3613:36, 6 July 2024 diff hist 0 ASIC →DMA sound channels
13:2913:29, 6 July 2024 diff hist 0 ASIC →DMA sound channels
13:2213:22, 6 July 2024 diff hist 0 ASIC →DMA sound channels
13:2113:21, 6 July 2024 diff hist +134 ASIC →DMA sound channels
12:5412:54, 6 July 2024 diff hist +12 CRTC →Internal Counters
12:4412:44, 6 July 2024 diff hist +21 CRTC →MA buffering
12:4112:41, 6 July 2024 diff hist +7 CRTC →CRTC counter differences
12:3812:38, 6 July 2024 diff hist +13 CRTC →MA reload
12:3712:37, 6 July 2024 diff hist +1 CRTC →MA reload
12:3012:30, 6 July 2024 diff hist +21 CRTC →CRTC counter differences
12:2712:27, 6 July 2024 diff hist −2 CRTC →MA reload
12:2612:26, 6 July 2024 diff hist +34 CRTC →MA reload
12:2412:24, 6 July 2024 diff hist +1 CRTC →CRTC counter differences
12:2312:23, 6 July 2024 diff hist +1 CRTC →CRTC counter differences
12:2212:22, 6 July 2024 diff hist 0 CRTC →CRTC counter differences
11:2611:26, 6 July 2024 diff hist −55 CRTC →Overscan bits
11:2411:24, 6 July 2024 diff hist +1,924 CRTC →Addressing
11:2411:24, 6 July 2024 diff hist −1,924 CRTC →CRTC registers
11:2211:22, 6 July 2024 diff hist +23 CRTC →CRTC registers
11:1811:18, 6 July 2024 diff hist −4 Programming:Unlocking ASIC No edit summary
10:4010:40, 6 July 2024 diff hist 0 CRTC →MA reload
10:3810:38, 6 July 2024 diff hist −28 CRTC →MA reload
10:3410:34, 6 July 2024 diff hist +3 CRTC →CRTC counter differences
10:2410:24, 6 July 2024 diff hist 0 CRTC →CRTC register differences
10:2310:23, 6 July 2024 diff hist +22 CRTC →CRTC register differences
10:1810:18, 6 July 2024 diff hist +1 CRTC →MA buffering
09:5409:54, 6 July 2024 diff hist +3 CRTC →MA reload
09:5209:52, 6 July 2024 diff hist +6 CRTC →CRTC counter differences
09:5109:51, 6 July 2024 diff hist +6 CRTC →CRTC counter differences
09:5009:50, 6 July 2024 diff hist +138 CRTC →CRTC counter differences
09:0609:06, 6 July 2024 diff hist +73 CRTC →CRTC counter differences
06:3806:38, 6 July 2024 diff hist +655 CRTC →CRTC counter differences

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