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User contributions for Phi2x

Results for Phi2x talk block log uploads logs
A user with 0 edits. Account created on 1 September 2026.

18:5318:53, 4 July 2024 diff hist +84 Gate Array →Palette sorted by Firmware Colour Numbers
18:3718:37, 4 July 2024 diff hist +116 Gate Array →Palette sorted by Firmware Colour Numbers
18:2918:29, 4 July 2024 diff hist +234 Gate Array →Palette sorted by Hardware Colour Numbers
18:1618:16, 4 July 2024 diff hist +5 Gate Array →Intensities
18:1518:15, 4 July 2024 diff hist +180 Gate Array →Intensities
18:0618:06, 4 July 2024 diff hist +12 Gate Array →Green Screen Colours
18:0318:03, 4 July 2024 diff hist +18 Gate Array →Palette R,G,B definitions
18:0218:02, 4 July 2024 diff hist +6 Gate Array →Intensities
18:0118:01, 4 July 2024 diff hist +9 Gate Array →Palette R,G,B definitions
17:0717:07, 4 July 2024 diff hist +6 Default I/O Port Summary →Memory Mapped I/O Ports
17:0717:07, 4 July 2024 diff hist +12 Default I/O Port Summary No edit summary
17:0717:07, 4 July 2024 diff hist 0 Default I/O Port Summary →Memory Mapped I/O Ports
17:0517:05, 4 July 2024 diff hist +3,701 Default I/O Port Summary No edit summary
15:5515:55, 4 July 2024 diff hist −71 Gate Array →Introduction
15:4115:41, 4 July 2024 diff hist +77 Gate Array →Interrupt management
15:3115:31, 4 July 2024 diff hist −8 Gate Array →Interrupt management
15:2715:27, 4 July 2024 diff hist +4 Gate Array →Interrupt management
15:2715:27, 4 July 2024 diff hist +4 Gate Array →Interrupt management
15:2515:25, 4 July 2024 diff hist +128 Gate Array →Interrupt management
15:1415:14, 4 July 2024 diff hist +152 Gate Array →Interrupt management
14:4114:41, 4 July 2024 diff hist +5 Upper ROM Bank Number →ASIC ROM numbering system
14:3814:38, 4 July 2024 diff hist +4 PAL16L8 →PAL MMR register
14:3614:36, 4 July 2024 diff hist +12 Programming:Unlocking ASIC No edit summary
14:2914:29, 4 July 2024 diff hist −1 Gate Array →Register RMR2 (ASIC & Advanced ROM mapping)
13:2113:21, 4 July 2024 diff hist +14 Gate Array →Registers
13:1913:19, 4 July 2024 diff hist +123 Gate Array →Registers
13:0013:00, 4 July 2024 diff hist +2 Upper ROM Bank Number →ASIC ROM numbering system
12:5612:56, 4 July 2024 diff hist +6 Upper ROM Bank Number →ASIC ROM numbering system
12:5412:54, 4 July 2024 diff hist +35 Gate Array →Register RMR2 (ASIC & Advanced ROM mapping)
12:5012:50, 4 July 2024 diff hist +872 Upper ROM Bank Number No edit summary
12:0112:01, 4 July 2024 diff hist +1 Gate Array →Summary
11:5611:56, 4 July 2024 diff hist +3 Gate Array →Summary
11:4111:41, 4 July 2024 diff hist +41 Gate Array →Summary
11:3511:35, 4 July 2024 diff hist −11 Gate Array →Register RMR2 (ASIC & Advanced ROM mapping)
11:2911:29, 4 July 2024 diff hist 0 Gate Array →Register RMR2 (ASIC & Advanced ROM mapping)
11:2211:22, 4 July 2024 diff hist +808 Gate Array →Registers
10:4410:44, 4 July 2024 diff hist 0 PAL16L8 →PAL I/O port
10:4210:42, 4 July 2024 diff hist +4 Gate Array →Controlling the Gate Array
10:4110:41, 4 July 2024 diff hist 0 Gate Array →Register MMR (RAM Memory mapping)
10:4110:41, 4 July 2024 diff hist +9 Gate Array →Register 3 - RAM Banking
10:4010:40, 4 July 2024 diff hist +20 Gate Array →Register 2 - Select screen mode and ROM configuration
10:3910:39, 4 July 2024 diff hist +29 Gate Array →Register 1 - Palette Data (Colour selection)
10:3910:39, 4 July 2024 diff hist +1 Gate Array →Registers
10:3910:39, 4 July 2024 diff hist +9 Gate Array →Registers
10:3810:38, 4 July 2024 diff hist −13 Gate Array →Registers
10:3610:36, 4 July 2024 diff hist +597 Gate Array →Controlling the Gate Array
09:5709:57, 4 July 2024 diff hist +35 Gate Array No edit summary
09:4709:47, 4 July 2024 diff hist +158 Programming:Unlocking ASIC No edit summary
06:4106:41, 4 July 2024 diff hist +32 CRTC →Vertical Adjustment mode
06:3706:37, 4 July 2024 diff hist +2 CRTC →Vertical Adjustment mode

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