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20 July 2011
- 12:0612:06, 20 July 2011 diff hist +45 FPGAmstrad →How to assemble it
- 12:0412:04, 20 July 2011 diff hist +1 FPGAmstrad →How to assemble it
- 12:0212:02, 20 July 2011 diff hist +41 FPGAmstrad →Source code
- 11:5911:59, 20 July 2011 diff hist +770 FPGAmstrad →How to assemble it
- 11:5211:52, 20 July 2011 diff hist −1 FPGAmstrad →Second schematic RAM+VGA
- 11:5111:51, 20 July 2011 diff hist −5 FPGAmstrad →Second schematic RAM+VGA
- 11:5011:50, 20 July 2011 diff hist +4 FPGAmstrad →Second schematic RAM+VGA
- 11:4811:48, 20 July 2011 diff hist 0 FPGAmstrad →Tests done
- 11:4411:44, 20 July 2011 diff hist −1 FPGAmstrad →Third schematic Z80+ROM+RAM+VGA
- 11:4211:42, 20 July 2011 diff hist −27 FPGAmstrad →Second schematic RAM+VGA
- 11:3711:37, 20 July 2011 diff hist −2 FPGAmstrad →Third schematic Z80+ROM+RAM+VGA
- 11:3611:36, 20 July 2011 diff hist +4 FPGAmstrad →Third schematic Z80+ROM+RAM+VGA
- 11:3411:34, 20 July 2011 diff hist +1 FPGAmstrad →Third schematic Z80+ROM+RAM+VGA
- 11:3311:33, 20 July 2011 diff hist +2,534 FPGAmstrad →Agile method
- 10:5910:59, 20 July 2011 diff hist +53 FPGAmstrad →FPGA internal RAM size
- 10:5710:57, 20 July 2011 diff hist +24 FPGAmstrad →Effort done
- 10:5510:55, 20 July 2011 diff hist +426 FPGAmstrad →Effort done
- 10:3310:33, 20 July 2011 diff hist +2 FPGAmstrad →RAM dump
- 10:3110:31, 20 July 2011 diff hist +2 FPGAmstrad →Why NEXYS2 500kgates starter kit
- 10:2810:28, 20 July 2011 diff hist −38 FPGAmstrad →Schematics
- 10:1510:15, 20 July 2011 diff hist +203 FPGAmstrad →VHDL components size
- 10:0010:00, 20 July 2011 diff hist +499 FPGAmstrad →Agile method
- 09:5309:53, 20 July 2011 diff hist +1,036 FPGAmstrad →Agile method
19 July 2011
- 21:2621:26, 19 July 2011 diff hist +3 FPGAmstrad →Clock sequence
- 21:2521:25, 19 July 2011 diff hist +1 FPGAmstrad →Clock sequence
- 21:2421:24, 19 July 2011 diff hist +5 FPGAmstrad →Bootloader
- 21:2321:23, 19 July 2011 diff hist −103 FPGAmstrad →Clock sequence
- 21:1821:18, 19 July 2011 diff hist +1,460 FPGAmstrad →Clock sequence
- 20:4220:42, 19 July 2011 diff hist +28 FPGAmstrad →Agile method
- 20:3920:39, 19 July 2011 diff hist +1 FPGAmstrad →Components
- 20:3420:34, 19 July 2011 diff hist 0 FPGAmstrad →Source code
- 20:2820:28, 19 July 2011 diff hist +10 FPGAmstrad No edit summary
- 20:2820:28, 19 July 2011 diff hist +404 FPGAmstrad No edit summary
- 20:1920:19, 19 July 2011 diff hist +1 FPGAmstrad No edit summary
- 20:1820:18, 19 July 2011 diff hist +6 FPGAmstrad No edit summary
- 20:1420:14, 19 July 2011 diff hist 0 FPGAmstrad →Components
- 20:1320:13, 19 July 2011 diff hist −53 FPGAmstrad →Schematics
- 20:0520:05, 19 July 2011 diff hist +38 FPGAmstrad →How to assemble it
- 20:0220:02, 19 July 2011 diff hist 0 FPGAmstrad No edit summary
- 20:0120:01, 19 July 2011 diff hist −70 FPGAmstrad No edit summary
- 19:5919:59, 19 July 2011 diff hist +4 FPGAmstrad →Source code
- 19:5719:57, 19 July 2011 diff hist +37 FPGAmstrad →Agile method
- 19:5619:56, 19 July 2011 diff hist +775 FPGAmstrad No edit summary
- 19:3419:34, 19 July 2011 diff hist −1 FPGAmstrad No edit summary
- 19:3219:32, 19 July 2011 diff hist +79 FPGAmstrad →Components
- 19:2919:29, 19 July 2011 diff hist +301 FPGAmstrad →Components
- 19:2019:20, 19 July 2011 diff hist +1,522 FPGAmstrad No edit summary
- 18:5418:54, 19 July 2011 diff hist +1,397 FPGAmstrad No edit summary
- 18:2818:28, 19 July 2011 diff hist +33 FPGAmstrad No edit summary
- 18:2518:25, 19 July 2011 diff hist +2,165 N FPGAmstrad Created page with "This is a VHDL version of Amstrad CPC 6128 running on FPGA starter-kit NEXYS2 500k-gates from Digilent. A starter-kit is a standard board made for learning FPGA, so it is standar..."