Schneiderware Pseudo ROM - Revision history

Ygdrazil at 07:20, 29 August 2014

2014-08-29T07:20:32Z

← Older revision		Revision as of 07:20, 29 August 2014
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	* [[Media:Schneiderware 8 - Pseudo ROM.pdf\|Schneiderware 8 - Pseudo ROM.pdf]] - SRAM and EPROM mapped as ROM - '''4/1987 page 26-34''', plus corrections in 5/1987 page 32-34		* [[Media:Schneiderware 8 - Pseudo ROM.pdf\|Schneiderware 8 - Pseudo ROM.pdf]] - SRAM and EPROM mapped as ROM - '''4/1987 page 26-34''', plus corrections in 5/1987 page 32-34

			[[Category:Peripherals]]

Gryzor at 16:56, 27 August 2011

2011-08-27T16:56:46Z

← Older revision		Revision as of 16:56, 27 August 2011
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	== Software ==		== Software ==

	The magazine article contains three listings with examples how to use the Pseudo ROM board, including a ROM version of the [[Schneiderware Real Time Clock]] driver.		The magazine article contains three listings with examples on how to use the Pseudo ROM board, including a ROM version of the [[Schneiderware Real Time Clock]] driver.

	== Scanned Article ==		== Scanned Article ==

	* [[Media:Schneiderware 8 - Pseudo ROM.pdf\|Schneiderware 8 - Pseudo ROM.pdf]] - SRAM and EPROM mapped as ROM - '''4/1987 page 26-34''', plus corrections in 5/1987 page 32-34		* [[Media:Schneiderware 8 - Pseudo ROM.pdf\|Schneiderware 8 - Pseudo ROM.pdf]] - SRAM and EPROM mapped as ROM - '''4/1987 page 26-34''', plus corrections in 5/1987 page 32-34

Nocash: /* I/O Ports */

2010-10-02T03:55:16Z

I/O Ports

← Older revision		Revision as of 03:55, 2 October 2010
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	\|}		\|}

	'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by [[AMSDOS]], for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Bank FFh (and XFh) can be also considred as reserved (as it's used by the "128K RAM detection" CP/M+). Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).		'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by [[AMSDOS]], for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Bank FFh (and XFh) can be also considred as reserved (as it's used by the "128K RAM detection" in CP/M+). Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).

	== Pictures ==		== Pictures ==

Nocash: /* I/O Ports */

2010-10-02T03:54:38Z

I/O Ports

← Older revision		Revision as of 03:54, 2 October 2010
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	\|}		\|}

	'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by [[AMSDOS]], for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).		'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by [[AMSDOS]], for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Bank FFh (and XFh) can be also considred as reserved (as it's used by the "128K RAM detection" CP/M+). Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).

	== Pictures ==		== Pictures ==

Nocash at 02:46, 2 October 2010

2010-10-02T02:46:10Z

@@ Line 2: / Line 2: @@
 The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.
 == I/O Ports ==
@@ Line 31: / Line 23: @@
 File:Schneiderware SRAM and EPROM Schematic.png|SRAM/EPROM Schematic
 </gallery>

Nocash: /* I/O Ports */

2010-09-30T20:10:01Z

I/O Ports

← Older revision		Revision as of 20:10, 30 September 2010
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	\|}		\|}

	'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by AMSDOS, for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).		'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by [[AMSDOS]], for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).

	== Pictures ==		== Pictures ==

Nocash: /* I/O Ports */

2010-09-30T20:09:29Z

I/O Ports

← Older revision		Revision as of 20:09, 30 September 2010
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	{\|{{Prettytable\|width: 700px; font-size: 2em;}}		{\|{{Prettytable\|width: 700px; font-size: 2em;}}
	\|Address (default~~) \|\| Address (alternate~~) \|\| Usage		\|Address (default) \|\| Usage
	\|-		\|-
	\|DFxxh ~~\|\| N/A~~ \|\| Schneiderware RAM/EPROM - [[Upper ROM Bank Number\|Expansion ROM bank number]] (W)<br>Battery-backed SRAM and/or EPROM are selected when the bank-number matches the jumper-selected values; the memory is then mapped to C000h..FFFFh (in case of READing one must also enable upper ROM via Gate Array). The bank number decoding is a bit strange:		\|DFxxh \|\| Schneiderware RAM/EPROM - [[Upper ROM Bank Number\|Expansion ROM bank number]] (W)<br>Battery-backed SRAM and/or EPROM are selected when the bank-number matches the jumper-selected values; the memory is then mapped to C000h..FFFFh (in case of READing one must also enable upper ROM via Gate Array). The bank number decoding is a bit strange:
	* EPROM/Read bank: All 8 bits decoded (bank 00h..FFh)		* EPROM/Read bank: All 8 bits decoded (bank 00h..FFh)
	* SRAM/Read bank: Only lower 4 bits decoded (bank X0h..XFh)		* SRAM/Read bank: Only lower 4 bits decoded (bank X0h..XFh)
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	\|-		\|-
	\|}		\|}

			'''Note''' - Port DFxxh is the standard [[Upper ROM Bank Number]] register, which is also used by AMSDOS, for example. Reserved banks are 00h=Basic, and 07h=AMSDOS. Other bank numbers can be used by one (or more) Schneiderware Pseudo ROM board(s).

	== Pictures ==		== Pictures ==

Nocash at 20:06, 30 September 2010

2010-09-30T20:06:18Z

← Older revision		Revision as of 20:06, 30 September 2010
Line 3:		Line 3:
	The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.		The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.

	~~----~~		== Software ==

	~~Databoxes: '''UHR8000''' RTC-RAM-driver in 10-1986 (hex listing~~, ~~plus~~ [[~~Hisoft Devpac~~]] ~~source code) (caution this version uses incorrect I/O addresses FBE1-FBE3), '''UHRC000X''' RTC-ROM-~~driver ~~in 4-1987 (this version uses correct I/O addresses FBE2-FBE4). Uni-PIO examples in 12-1986 (=only a few basic lines). There seem to be no Centronics and V/24 drivers included in databoxes~~.		The magazine article contains three listings with examples how to use the Pseudo ROM board, including a ROM version of the [[Schneiderware Real Time Clock]] driver.

	== Article ==		== Article ==

Nocash at 19:14, 30 September 2010

2010-09-30T19:14:42Z

← Older revision		Revision as of 19:14, 30 September 2010
Line 3:		Line 3:
	The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.		The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.

			----

	Databoxes: '''UHR8000''' RTC-RAM-driver in 10-1986 (hex listing, plus [[Hisoft Devpac]] source code) (caution this version uses incorrect I/O addresses FBE1-FBE3), '''UHRC000X''' RTC-ROM-driver in 4-1987 (this version uses correct I/O addresses FBE2-FBE4). Uni-PIO examples in 12-1986 (=only a few basic lines). There seem to be no Centronics and V/24 drivers included in databoxes.		Databoxes: '''UHR8000''' RTC-RAM-driver in 10-1986 (hex listing, plus [[Hisoft Devpac]] source code) (caution this version uses incorrect I/O addresses FBE1-FBE3), '''UHRC000X''' RTC-ROM-driver in 4-1987 (this version uses correct I/O addresses FBE2-FBE4). Uni-PIO examples in 12-1986 (=only a few basic lines). There seem to be no Centronics and V/24 drivers included in databoxes.
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	\|Address (default) \|\| Address (alternate) \|\| Usage		\|Address (default) \|\| Address (alternate) \|\| Usage
	\|-		\|-
	\|DFxxh \|\| N/A \|\| Schneiderware RAM/EPROM - Expansion ROM bank number (W)<br>Battery-backed SRAM and/or EPROM are selected when the bank-number matches the jumper-selected values; the memory is then mapped to C000h..FFFFh (in case of READing one must also enable upper ROM via Gate Array). The bank number decoding is a bit strange:		\|DFxxh \|\| N/A \|\| Schneiderware RAM/EPROM - [[Upper ROM Bank Number\|Expansion ROM bank number]] (W)<br>Battery-backed SRAM and/or EPROM are selected when the bank-number matches the jumper-selected values; the memory is then mapped to C000h..FFFFh (in case of READing one must also enable upper ROM via Gate Array). The bank number decoding is a bit strange:
	* EPROM/Read bank: All 8 bits decoded (bank 00h..FFh)		* EPROM/Read bank: All 8 bits decoded (bank 00h..FFh)
	* SRAM/Read bank: Only lower 4 bits decoded (bank X0h..XFh)		* SRAM/Read bank: Only lower 4 bits decoded (bank X0h..XFh)

Nocash: Created page with "The Schneiderware Pseudo ROM is a expansion "ROM" board, with 16K EPROM (read-only) and 16K battery-backed SRAM (read/write-able), published by german magazine [[CPC Schneide..."

2010-09-30T19:04:36Z

Created page with "The Schneiderware Pseudo ROM is a expansion "ROM" board, with 16K EPROM (read-only) and 16K battery-backed SRAM (read/write-able), published by german magazine [[CPC Schneide..."

New page

The [[Schneiderware Pseudo ROM]] is a expansion "ROM" board, with 16K EPROM (read-only) and 16K battery-backed SRAM (read/write-able), published by german magazine [[CPC Schneider International]] as part of their [[Schneiderware]] DIY series. The plain PCB, or the fully assembled board were also available via mail-order.

The [[ECB Bus]] connector of the board is intended to be plugged into the [[Schneiderware Basisplatine]], but it could be also wired directly to the CPCs Expansion Port.

Databoxes: '''UHR8000''' RTC-RAM-driver in 10-1986 (hex listing, plus [[Hisoft Devpac]] source code) (caution this version uses incorrect I/O addresses FBE1-FBE3), '''UHRC000X''' RTC-ROM-driver in 4-1987 (this version uses correct I/O addresses FBE2-FBE4). Uni-PIO examples in 12-1986 (=only a few basic lines). There seem to be no Centronics and V/24 drivers included in databoxes.

== Article ==

* [[Schneiderware Pseudo ROM|Schneiderware #8 Pseudo ROM (SRAM and EPROM mapped as ROM)]] (4/1987 pages 26-34, plus corrections in 5/1987 pages 32-34)

== I/O Ports ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|Address (default) || Address (alternate) || Usage
|-
|DFxxh || N/A || Schneiderware RAM/EPROM - Expansion ROM bank number (W)<br>Battery-backed SRAM and/or EPROM are selected when the bank-number matches the jumper-selected values; the memory is then mapped to C000h..FFFFh (in case of READing one must also enable upper ROM via Gate Array). The bank number decoding is a bit strange:
* EPROM/Read bank: All 8 bits decoded (bank 00h..FFh)
* SRAM/Read bank: Only lower 4 bits decoded (bank X0h..XFh)
* SRAM/Write bank: Only lower 4 bits decoded (bank X0h..XFh)
The SRAM/Write mode doesn't disable the internal RAM in the CPC, so writes are going both to SRAM and normal RAM at C000-FFFF, that no matter if upper ROM is enabled/disabled via Gate Array; the author recommended to map VRAM to 4000-7FFF via CRTC registers, in order to prevent video dirt during writing.
|-
|}

== Pictures ==

<gallery>
File:Schneiderware SRAM and EPROM Schematic.png|SRAM/EPROM Schematic
</gallery>