KC Compact - Revision history

Phi2x: /* Video */

2024-07-07T08:59:06Z

Video

← Older revision		Revision as of 08:59, 7 July 2024
Line 89:		Line 89:
	* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607 (Bulgarian clone of 6845), but the CRTC in mine [=Kevin's] is an HD6845P.		* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607 (Bulgarian clone of 6845), but the CRTC in mine [=Kevin's] is an HD6845P.
	* The clocks for each mode (0,1 and 2) are derived from the main 16MHz clock, these then drive the shift registers to output pixels to the display.		* The clocks for each mode (0,1 and 2) are derived from the main 16MHz clock, these then drive the shift registers to output pixels to the display.
	* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.		* Graphics Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.
	* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving "snow" on the screen. I have seen this effect, but I need to confirm how it is generated.		* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving "snow" on the screen. I have seen this effect, but I need to confirm how it is generated.
	* The video output doesn't generate luminance, so the KC Compact can't be used with a GT64 or MM14.		* The video output doesn't generate luminance, so the KC Compact can't be used with a GT64 or MM14.

Phi2x: /* Hardware differences */

2024-07-07T08:44:50Z

Hardware differences

← Older revision		Revision as of 08:44, 7 July 2024
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	* The colour palette is not cleared to black on reset		* The colour palette is not cleared to black on reset
	* The Amstrad unofficial mode ~~(bit 1=bit 0=1 of [[Gate Array]] mode register)~~ does not exist. The clock to the shift registers is stopped. The last colour is output.		* The Amstrad unofficial graphics mode 3 does not exist. The clock to the shift registers is stopped. The last colour is output.
	* The raster interrupt is generated in a different way by the CIO.		* The raster interrupt is generated in a different way by the CIO.

Prodatron: added first disc interface picture

2023-11-14T22:43:19Z

added first disc interface picture

@@ Line 356: / Line 356: @@
 Image:KCCompact_Keyboard_Top.jpg|Keyboard Top
 Image:KCCompact_Keyboard_Bottom.jpg|Keyboard bottom
 </gallery>

Sukram: /* Expansion socket */ Added the reference to the K1520 bus

2023-01-19T01:33:33Z

Expansion socket: Added the reference to the K1520 bus

← Older revision		Revision as of 01:33, 19 January 2023
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	=== Expansion socket ===		=== Expansion socket ===

	The KC compact has a real connector compared to the P.C.B. edge connector of an English CPC6128~~. The connector appears to be a PC Card connector~~. This connector is not the same as the one on a German CPC6128.		The KC compact has a real connector compared to the P.C.B. edge connector of an English CPC6128. This connector is not the same as the one on a German CPC6128.

	The expansion connector has more pins; 58 compared to 50 on an English CPC6128.		The expansion connector has more pins; 58 compared to 50 on an English CPC6128.

			The connector is a 'K1520 bus' connector which is present on all East German microcomputers. Some details about it can be found on the Wikipedia page for 'VEB Robotron' and some more here https://www.robotrontechnik.de/html/standards/k1520.htm (in German)

	I am in the process of making an adaptor so that I can test CPC hardware on the KC Compact.		I am in the process of making an adaptor so that I can test CPC hardware on the KC Compact.

TFM: /* Operating systems */

2022-02-28T16:59:59Z

Operating systems

← Older revision		Revision as of 16:59, 28 February 2022
Line 404:		Line 404:
	* [[AMSDOS#BASDOS\|BASDOS]] - AMSDOS clone		* [[AMSDOS#BASDOS\|BASDOS]] - AMSDOS clone
	* [[CP/M#MicroDOS\|MicroDOS]] - CP/M clone		* [[CP/M#MicroDOS\|MicroDOS]] - CP/M clone
			* [[FutureOS]] - only with Revaldhinos RAM expansion (true RAM mode &C3)

	== KC Compact Computer Resources and Links ==		== KC Compact Computer Resources and Links ==

Kubik: /* Video */

2016-01-11T21:19:49Z

Video

← Older revision		Revision as of 21:19, 11 January 2016
Line 87:		Line 87:
	== Video ==		== Video ==

	* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in mine [=Kevin's] is an HD6845P.		* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607 (Bulgarian clone of 6845), but the CRTC in mine [=Kevin's] is an HD6845P.
	* The clocks for each mode (0,1 and 2) are derived from the main 16MHz clock, these then drive the shift registers to output pixels to the display.		* The clocks for each mode (0,1 and 2) are derived from the main 16MHz clock, these then drive the shift registers to output pixels to the display.
	* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.		* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.

Kubik: /* UA880 CPU (equivalent to Zilog Z80) */

2016-01-11T21:17:49Z

UA880 CPU (equivalent to Zilog Z80)

← Older revision		Revision as of 21:17, 11 January 2016
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	== UA880 CPU (equivalent to Zilog Z80) ==		== UA880 CPU (equivalent to Zilog Z80) ==

	The KC compact uses a UA880 CPU, which is ~~a Russian~~ clone of the [[Z80]]. It is not confirmed whether there are any actual differences compared to a real Z80. In terms of documentation, the KC Compact System Handbook lists the opcodes SLL, INF [a.k.a. IN F,(C)], and OUTF [a.k.a. OUT (C),F], whereas these have remained undocumented by Zilog.		The KC compact uses a UA880 CPU, which is an East German clone of the [[Z80]]. It is not confirmed whether there are any actual differences compared to a real Z80. In terms of documentation, the KC Compact System Handbook lists the opcodes SLL, INF [a.k.a. IN F,(C)], and OUTF [a.k.a. OUT (C),F], whereas these have remained undocumented by Zilog.

	== Video ==		== Video ==

Polluks: /* Video */

2015-09-16T16:28:47Z

Video

← Older revision		Revision as of 16:28, 16 September 2015
Line 88:		Line 88:

	* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in mine [=Kevin's] is an HD6845P.		* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in mine [=Kevin's] is an HD6845P.
	* The clocks for each mode (0,1 and 2) are derived from the main ~~16Mhz~~ clock, these then drive the shift registers to output pixels to the display.		* The clocks for each mode (0,1 and 2) are derived from the main 16MHz clock, these then drive the shift registers to output pixels to the display.
	* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.		* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.
	* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving "snow" on the screen. I have seen this effect, but I need to confirm how it is generated.		* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving "snow" on the screen. I have seen this effect, but I need to confirm how it is generated.

Db6128: We didn't revert this when I got it wrong before :P

2012-12-14T23:12:10Z

We didn't revert this when I got it wrong before :P

← Older revision		Revision as of 23:12, 14 December 2012
Line 87:		Line 87:
	== Video ==		== Video ==

	* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in ~~CPCLER~~'s an HD6845P.		* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in mine [=Kevin's] is an HD6845P.
	* The clocks for each mode (0,1 and 2) are derived from the main 16Mhz clock, these then drive the shift registers to output pixels to the display.		* The clocks for each mode (0,1 and 2) are derived from the main 16Mhz clock, these then drive the shift registers to output pixels to the display.
	* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.		* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.

Arnoldemu at 09:16, 3 December 2012

2012-12-03T09:16:43Z

← Older revision		Revision as of 09:16, 3 December 2012
Line 1:		Line 1:
	''Note: Much of this article was originally written by [[~~User:Kevin Thacker\|~~Kevin Thacker]] and so any references in the first person ("I", "me", ''etc.'') are ~~probably~~ by him.		''Note: Much of this article was originally written by [[Kevin Thacker]] and so any references in the first person ("I", "me", ''etc.'') are by him.

	[[Image:Kcc top.jpg\|right\|thumb\|250px\|The East German KC Compact Computer]]		[[Image:Kcc top.jpg\|right\|thumb\|250px\|The East German KC Compact Computer]]