Dobbertin Smart Watch - Revision history

Phi2x: /* Downloads */

2025-04-09T14:16:08Z

Downloads

← Older revision		Revision as of 14:16, 9 April 2025
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	* [[media:TIMEROM+.ROM\|TIME ROM+]] ROM file		* [[media:TIMEROM+.ROM\|TIME ROM+]] ROM file
	* [[media:MF2_RRB.DSK\|MF2_RRB.DSK]] - Vortex disc, containing the TimeRom+ CP/M driver		* [[media:MF2_RRB.DSK\|MF2_RRB.DSK]] - Vortex disc, containing the TimeRom+ CP/M driver
			* [[Media:DXS RTC - User Manual.pdf\|DXS RTC User Manual]]

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2025-04-07T23:15:41Z

Technicals

← Older revision		Revision as of 23:15, 7 April 2025
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	The SmartWatch consists out of the [[RTC]] itself and an EPROM expansion with a lot of RSX commands. The RTC itself was inserted like an EPROM in any kind of ROM or EPROM card. Further it contains a little battery. At least one clock is still running in 2014!		The SmartWatch consists out of the [[RTC]] itself and an EPROM expansion with a lot of RSX commands. The RTC itself was inserted like an EPROM in any kind of ROM or EPROM card. Further it contains a little battery. At least one clock is still running in 2014!

	The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]		The Time-ROM can be on another ROM-select than the SmartWatch [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source].
	[[SymbOS]] is searching for the TIME.SET RSX command. It will then use this ROM. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249768/#msg249768 Source]		[[SymbOS]] is searching for the TIME.SET RSX command. It will then use this ROM [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249768/#msg249768 Source].

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2025-04-07T09:31:13Z

Technicals

← Older revision		Revision as of 09:31, 7 April 2025
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	The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]		The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]
	SymbOS is searching for the TIME.SET RSX command. It will then use this ROM. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249768/#msg249768 Source]		[[SymbOS]] is searching for the TIME.SET RSX command. It will then use this ROM. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249768/#msg249768 Source]

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2025-04-07T09:30:37Z

Technicals

← Older revision		Revision as of 09:30, 7 April 2025
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	The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]		The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]
			SymbOS is searching for the TIME.SET RSX command. It will then use this ROM. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249768/#msg249768 Source]

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2025-04-06T21:22:36Z

64bit packets

← Older revision		Revision as of 21:22, 6 April 2025
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	A0 data written to RTC, when A2=0=write		A0 data written to RTC, when A2=0=write
	D0 data read from RTC, when A2=1=read, and only when pattern recognized		D0 data read from RTC, when A2=1=read, and only when pattern recognized
	Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the ~~TimeROM+~~ mapped and at addresses corresponding to where it is mapped.		Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the SmartWatch mapped to memory and at addresses corresponding to where it is mapped.

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2025-04-06T20:33:43Z

Technicals

← Older revision		Revision as of 20:33, 6 April 2025
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	== Technicals ==		== Technicals ==
	The SmartWatch consists out of the [[RTC]] itself and an EPROM expansion with a lot of RSX commands. The RTC itself was inserted like an EPROM in any kind of ROM or EPROM card. Further it contains a little battery. At least one clock is still running in 2014!		The SmartWatch consists out of the [[RTC]] itself and an EPROM expansion with a lot of RSX commands. The RTC itself was inserted like an EPROM in any kind of ROM or EPROM card. Further it contains a little battery. At least one clock is still running in 2014!

			The Time-ROM can be on another ROM-select than the SmartWatch. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249697/#msg249697 Source]

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2025-04-06T00:03:49Z

Pictures

← Older revision		Revision as of 00:03, 6 April 2025
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	== Pictures ==		== Pictures ==
			The original RTC from Dobbertin:

	[[File:DALLAS_DS1216.jpg]]		[[File:DALLAS_DS1216.jpg]]
	~~The original RTC from Dobbertin.~~

	~~The DXS RTC is a Dobbertin RTC clone. [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249386/#msg249386 Source]~~

	[[File:RTCdxs.jpeg\|~~720px~~]]		The DXS RTC is a Dobbertin RTC clone [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/real-time-clock-board/msg249386/#msg249386 Source]:
	~~The expanded version from DXS.~~
			[[File:RTCdxs.jpeg\|500px]]

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2025-04-05T13:40:02Z

Recognition Pattern

← Older revision		Revision as of 13:40, 5 April 2025
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	The recognition pattern is: C5h, 3Ah, A3h, 5Ch, C5h, 3Ah, A3h, 5Ch.		The recognition pattern is: C5h, 3Ah, A3h, 5Ch, C5h, 3Ah, A3h, 5Ch.

	The ~~Dobbertin~~ chip requires 64 sequential writes with magic serial data on A0 to unlock it, immediately followed by 64 sequential reads to retrieve the 64-bit time data packet from D0, after which the chip locks itself back into ROM mode.		The RTC chip requires 64 sequential writes with magic serial data on A0 to unlock it, immediately followed by 64 sequential reads to retrieve the 64-bit time data packet from D0, after which the chip locks itself back into ROM mode.

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2025-04-05T13:37:52Z

64bit packets

← Older revision		Revision as of 13:37, 5 April 2025
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	D0 data read from RTC, when A2=1=read, and only when pattern recognized		D0 data read from RTC, when A2=1=read, and only when pattern recognized
	Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the TimeROM+ mapped and at addresses corresponding to where it is mapped.		Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the TimeROM+ mapped and at addresses corresponding to where it is mapped.

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2025-04-05T13:11:24Z

64bit packets

← Older revision		Revision as of 13:11, 5 April 2025
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	A0 data written to RTC, when A2=0=write		A0 data written to RTC, when A2=0=write
	D0 data read from RTC, when A2=1=read, and only when pattern recognized		D0 data read from RTC, when A2=1=read, and only when pattern recognized
	Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the ~~ROM~~ mapped and at addresses corresponding to where ~~the ROM~~ is mapped.		Note: Writes to the RTC chip are performed by using Z80 reads (PEEK) and the A2 and A0 address lines, with the TimeROM+ mapped and at addresses corresponding to where it is mapped.
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